During semiconductor integrated circuit processing dielectric and hard mask layers are removed to pattern openings for metallization levels for back end of line (BEOL) integrated circuit structures in a semiconductor device. During hard mask removal after the patterning, exposed portions of contact areas in the openings that would be positioned below the resulting metallization layers are undesirably eroded and/or removed. For example, portions of tungsten or cobalt contact areas are undesirably eroded and/or removed during a hard mask removal process that is performed using a wet etch.
Accordingly, there is a need to prevent unwanted erosion and/or removal of contact area portions that occurs during processing to form metallization levels.